BUSY  IDLE

busy ( ---)

Specific Flash Forth

CPU idle mode not allowed.

idle ( ---)

Specific Flash Forth

CPU idle is allowed.

When the SM2..0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle mode, stopping the CPU but allowing the SPI, USART, Analog Comparator, ADC, 2-wire Serial Interface, Timer/Counters, Watchdog, and the interrupt system to continue operating. This sleep mode basically halts clkCPU and clkFLASH, while allowing the other clocks to run.

Idle mode enables the MCU to wake up from external triggered interrupts as well as internal ones like the Timer Overflow and USART Transmit Complete interrupts. If wake-up from the Analog Comparator interrupt is not required, the Analog Comparator can be powered down by setting the ACD bit in the Analog Comparator Control and Status Register – ACSR. This will reduce power consumption in Idle mode. If the ADC is enabled, a conversion starts automatically when this mode is entered.

Give the command idle. FlashForth will then sleep in PAUSE until the next interrupt.

During the sleep the the led is shut off.

Command busy will skip the sleep and run the CPU at 100 %.

After start, FlashForth will run full speed in the busy state.